3.3v lvds 4-bit flow-through high speed differential receiver.
s Greater than 400Mbs data rate s Flow-through pinout simplifies PCB layout s 3.3V power supply operation s 0.4ns maximum differential pulse skew s 2.5ns maximum propagat.
This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provide.
Image gallery
TAGS
Download (Size : 249.78KB)