* s Greater than 400 Mbps data rate s 3.3V power supply operation s Low power dissipation s Fail safe protection for open-circuit conditions s Meets or exceeds the TIA/EIA-644-A LVDS standard s 16-pin TSSOP package saves space s Flow-through pinout simplifies PCB layout s Enable/Disable for all output
FIN1049
Fairchild Semiconductor
318.21 KB
Lvds dual line driver.
FIN1049 LVDS Dual Line Driver with Dual Line Receiver March 2003 Revised March 2003 FIN1049 LVDS Dual Line Driver with Dual Line Receiver General D.
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