M74HC125 Datasheet | Fairchild Semiconductor

Description The MM74HC125 and MM74HC126 are general purpose 3-STATE high speed non-inverting buffers utilizing advanced silicon-gate CMOS technology. They have high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits possess the low power dissipation of CMOS circuitry, yet have speeds parable to low power Schottky TTL circuits. Both circuits are capable of driving up to 15 low power Schottky inputs. The MM74HC125 require the 3-STATE control input C to be taken high to put the output into the high impedance condition, whereas the MM74HC126 require the control input to be low to put the output into high impedance. All inputs are protected from damage due to static discharge by diodes to VCC and ground. Features s Typical propagation delay: 13 ns s Wide operating voltage range: 2- 6V s Low input current: 1 µA maximum s Low quiescent current: 80 µA maximum (74HC) s Fanout of 15 LS-TTL loads Ordering Code: Order Number MM74HC125M MM74HC125SJ MM74HC125MTC MM74HC125N MM74HC126M MM74HC126SJ MM74HC126MTC MM74HC126N Package Number M14A M14D MTC14 N14A M14A M14D MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. (Tape and Reel not available in N14A.) Connection Diagrams Pin Assignments for DIP, SOIC, SOP and TSSOP Top View (MM74HC125) Top View...