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MC100ES60T22 Datasheet 3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Translator

Manufacturer: Freescale Semiconductor (now NXP Semiconductors)

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General Description

Function LVTTL/LVCMOS Inputs LVPECL Differential Outputs Positive Supply Negative Supply Q1 4 5 GND VCC GND Figure 1.

8-Lead Pinout (Top View) and Logic Diagram © Freescale Semiconductor, Inc., 2005.

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Overview

Freescale Semiconductor Technical Data MC100ES60T22 Rev 2, 2/2005 www.DataSheet4U.com 3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Translator The MC100ES60T22 is a low skew dual LVTTL/LVCMOS to differential LVPECL translator.

The low voltage PECL levels, small package, and dual gate design are ideal for clock translation applications.

Key Features

  • 280 ps typical propagation delay 100 ps max output-to-output skew LVPECL operating range: VCC = 3.135 V to 3.8 V 8-lead SOIC and 8-lead TSSOP packages Ambient temperature range.
  • 40°C to +85°C MC100ES60T22 D SUFFIX 8-LEAD SOIC.

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