GS88136B datasheet, srams equivalent, GSI

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Features and benefits

* IEEE 1149.1 JTAG-compatible Boundary Scan
* 2.5 V or 3.3 V +10%/
–10% core power supply
* 2.5 V or 3.3 V I/O supply
* LBO pin for Linear .

Application

* JEDEC-standard 100-lead TQFP and 165-bump BGA packages
* RoHS-compliant 100-lead TQFP and 165-bump BGA package.

Description

Applications The GS88118B(T/D)/GS88132B(T/D)/GS88136B(T/D) is a 9,437,184-bit high performance synchronous SRAM with a 2bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs.

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