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GS88132B - (GS88118B - GS88136B) Sync Burst SRAMs

This page provides the datasheet information for the GS88132B, a member of the GS88118B (GS88118B - GS88136B) Sync Burst SRAMs family.

Datasheet Summary

Description

Applications The GS88118B(T/D)/GS88132B(T/D)/GS88136B(T/D) is a 9,437,184-bit high performance synchronous SRAM with a 2bit burst address counter.

Features

  • IEEE 1149.1 JTAG-compatible Boundary Scan.
  • 2.5 V or 3.3 V +10%/.
  • 10% core power supply.
  • 2.5 V or 3.3 V I/O supply.
  • LBO pin for Linear or Interleaved Burst mode.
  • Internal input resistors on mode pins allow floating mode pins.
  • Byte Write (BW) and/or Global Write (GW) operation.
  • Internal self-timed write cycle.
  • Automatic power-down for portable.

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Datasheet preview – GS88132B

Datasheet Details

Part number GS88132B
Manufacturer GSI
File Size 1.04 MB
Description (GS88118B - GS88136B) Sync Burst SRAMs
Datasheet download datasheet GS88132B Datasheet
Additional preview pages of the GS88132B datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com GS88118B(T/D)/GS88132B(T/D)/GS88136B(T/D) 100-pin TQFP & 165-bump BGA Commercial Temp Industrial Temp Features • IEEE 1149.1 JTAG-compatible Boundary Scan • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating mode pins • Byte Write (BW) and/or Global Write (GW) operation • Internal self-timed write cycle • Automatic power-down for portable applications • JEDEC-standard 100-lead TQFP and 165-bump BGA packages • RoHS-compliant 100-lead TQFP and 165-bump BGA packages available 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.
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