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GS88136T - (GS88118 / GS88136T) Sync Burst SRAMs

Download the GS88136T datasheet PDF. This datasheet also covers the GS88118 variant, as both devices belong to the same (gs88118 / gs88136t) sync burst srams family and are provided as variant models within a single manufacturer datasheet.

Description

The GS88118//36T is a 9,437,184-bit high performance synchronous SRAM with a 2-bit burst address counter.

Features

  • FT pin for user-configurable flow through or pipelined operation.
  • Single Cycle Deselect (SCD) Operation.
  • IEEE 1149.1 JTAG-compatible Boundary Scan.
  • On-chip write parity checking; even or odd selectable.
  • 3.3 V +10%/.
  • 5% core power supply.
  • 2.5 V or 3.3 V I/O supply.
  • LBO pin for Linear or Interleaved Burst mode.
  • Internal input resistors on mode pins allow floating mode pins.
  • Default to Interleaved Pipeline mode.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (GS88118_GSI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number GS88136T
Manufacturer GSI
File Size 345.49 KB
Description (GS88118 / GS88136T) Sync Burst SRAMs
Datasheet download datasheet GS88136T Datasheet

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Other Datasheets by GSI

Part Number Description
GS88136A (GS88118A - GS88136A) Synchronous Burst SRAMs
GS88136B (GS88118B - GS88136B) Sync Burst SRAMs
GS88132A (GS88118A - GS88136A) Synchronous Burst SRAMs
GS88132B (GS88118B - GS88136B) Sync Burst SRAMs
GS88118 (GS88118 / GS88136T) Sync Burst SRAMs

Full PDF Text Transcription

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www.DataSheet4U.com Preliminary GS88118/36T-11/11.5/100/80/66 100-Pin TQFP Commercial Temp Industrial Temp 1.11 9/2000Features • FT pin for user-configurable flow through or pipelined operation • Single Cycle Deselect (SCD) Operation • IEEE 1149.1 JTAG-compatible Boundary Scan • On-chip write parity checking; even or odd selectable • 3.3 V +10%/–5% core power supply • 2.5 V or 3.
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