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HM6207H - 256K High Speed SRAM

General Description

Pin Name A0 AI7 Din Dout &6 :( VCC VSS Function Address Data input Data output Chip select Write enable Power supply Ground 2 HM6207H Series Block Diagram A15 A16 A17 A0 A1 A2 A3 A4 Din Row decoder Memory array 256 × 1024 VCC VSS Column I/O Column decoder Dout CS WE A9 A14 A13 A12A1

Key Features

  • Single 5 V supply and high density 24-pin package.
  • High speed Access time: 25/35/45 ns (max).
  • Low power  Operation: 300 mW (typ)  Standby: 100 µW (typ) 30 µW (typ) (L-version).
  • Completely static memory required, no clock or timing strobe required.
  • Equal access and cycle time.
  • Directly TTL compatible, all inputs and outputs.
  • Battery backup operation capability (L-version) Ordering Information Type No. HM6207HP-25 HM6207HP-35 HM620.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HM6207H Series 256 k High Speed SRAM (256-kword × 1-bit) Features • Single 5 V supply and high density 24-pin package • High speed Access time: 25/35/45 ns (max) • Low power  Operation: 300 mW (typ)  Standby: 100 µW (typ) 30 µW (typ) (L-version) • Completely static memory required, no clock or timing strobe required • Equal access and cycle time • Directly TTL compatible, all inputs and outputs • Battery backup operation capability (L-version) Ordering Information Type No.