HD74ALVCH16543 Datasheet | Hitachi Semiconductor

16-bit Registered Transceivers with 3-state Outputs ADE-205-169A (Z) 2nd. Edition December 1999 Description The HD74ALVCH16543 can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch enable (LEAB or LEBA ) and output enable (OEAB or OEBA ) inputs are provided for each register to permit independent control in either direction of data flow. The A to B enable (CEAB) input must be low in order to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A to B latches are transparent; a subsequent low to high transition of LEAB puts the A latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using CEBA , LEBA, and OEBA. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Features - VCC = 2.3 V to 3.6 V - Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) - Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) - High output current ±24 m A (@V CC = 3.0 V) - Bus hold on data inputs eliminates the need for external pullup / pulldown resistors Function Table - 1 Inputs CEAB H X L L L LEAB X X H L L OEAB X H L L L A X X X L H Z Z B0 L H - 2 Output B H : High level L : Low level X : Immaterial Z : High impedance Notes 1. A to B data flow is shown; B to A flow control is the same except that it uses CEBA , LEBA, and OEBA. 2. Output level before the indicated steady state input conditions were established. Pin Arrangement 1OEAB 1 1LEAB 2 1CEAB 3 GND 4 1A1 5 1A2 6 VCC 7 1A3 8 1A4 9 1A5 10 GND 11 1A6 12 1A7 13 1A8 14 2A1 15 2A2 16 2A3 17 GND 18 2A4 19 2A5 20 2A6 21 VCC 22 2A7 23 2A8 24 GND 25 2CEAB 26 2LEAB 27 2OEAB 28 56 1OEBA 55 1LEBA 54 1CEBA 53 GND 52 1B1 51 1B2 50 VCC 49 1B3 48 1B4 47 1B5 46 GND 45 1B6 44 1B7 43 1B8 42 2B1 41 2B2 40 2B3 39 GND 38 2B4 37 2B5 36 2B6 35 VCC 34...