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HD74HC175 - Quad. D-typ Flip-Flops (with Clear)

Datasheet Summary

Description

Information at the D inputs of the HD74HC175 is transferred to the Q and Q outputs on the positive going edge of the clock pulse.

Both true and compliment outputs from each flip-flop are externally available.

All four flip flops are controlled by a common clock and a common clear.

Features

  • High Speed Operation: tpd (Clock to Q) = 14 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs Clear L H H H L Clock X D X H L H Outputs Q L H L no change Q H L H HD74HC175 Pin Arrangement Clear 1 1Q 2 1Q 3 1D 4 2D 5 2Q 6 2Q 7 GND 8 (Top view) D CK Q CLR Q D Q CK CLR Q Q CLR C.

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Datasheet preview – HD74HC175

Datasheet Details

Part number HD74HC175
Manufacturer Hitachi Semiconductor
File Size 59.50 KB
Description Quad. D-typ Flip-Flops (with Clear)
Datasheet download datasheet HD74HC175 Datasheet
Additional preview pages of the HD74HC175 datasheet.
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HD74HC175 Quad. D-typ Flip-Flops (with Clear) Description Information at the D inputs of the HD74HC175 is transferred to the Q and Q outputs on the positive going edge of the clock pulse. Both true and compliment outputs from each flip-flop are externally available. All four flip flops are controlled by a common clock and a common clear. Clearing is accomplished by a negative pulse at the clear input. All four Q outputs are cleared to a logic low level and all four Q outputs to a logic high level.
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