HD74HC107 Datasheet PDF - Hitachi Semiconductor Dual J-K Flip-Flops Specs

HD74HC107 - Dual J-K Flip-Flops

Datasheet Summary

Description

This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse.

Each one has independent J, K, clock, and clear inputs and Q and Q outputs.

Clear is independent of the clock and accomplished by a low level on the input.

Features

High Speed Operation: tpd (Clock to Q) = 19 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Function Table Inputs Clear L H H H H H H H L H Clock X J X L L H H X X X K X L H L H X X X Output Q L No change L H Toggle No change No change No change H L Q H HD74HC107 Pin Arrangement 1J 1Q 1Q 1K 2Q 2.

Datasheet Details

Part number	HD74HC107
Manufacturer	Hitachi Semiconductor
File Size	57.94 KB
Description	Dual J-K Flip-Flops
Datasheet	HD74HC107 Datasheet
Additional preview pages of the HD74HC107 datasheet.

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Full PDF Text Transcription

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HD74HC107 Dual J-K Flip-Flops (with Clear) Description This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Each one has independent J, K, clock, and clear inputs and Q and Q outputs. Clear is independent of the clock and accomplished by a low level on the input.

Published: Mar 23, 2005 |