HD74HC113 Datasheet PDF - Hitachi Semiconductor Dual J-K Flip-Flops Specs

HD74HC113 - Dual J-K Flip-Flops

Datasheet Summary

Description

This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse.

Each one has independent J, K, clock, and preset inputs and Q and Q inputs.

Preset is independent of the clock and accomplished by a low level on the input.

Features

High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Function Table Inputs Preset L H H H H H H H H L Clock X J X L L H H X X X K X L H L H X X X Output Q H No change L H Toggle No change No change No change H L Q L HD74HC113 Pin Arrangement 1CK 1K 1J 1PR 1.

Datasheet Details

Part number	HD74HC113
Manufacturer	Hitachi Semiconductor
File Size	52.32 KB
Description	Dual J-K Flip-Flops
Datasheet	HD74HC113 Datasheet
Additional preview pages of the HD74HC113 datasheet.

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Full PDF Text Transcription

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HD74HC113 Dual J-K Flip-Flops (with Preset) Description This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Each one has independent J, K, clock, and preset inputs and Q and Q inputs. Preset is independent of the clock and accomplished by a low level on the input.

Published: Mar 23, 2005 |