HD74HC109 Datasheet PDF - Hitachi Semiconductor Dual J-K Flip-Flops Specs

HD74HC109 - Dual J-K Flip-Flops

Datasheet Summary

Description

Each flip-flop has independent J, K , preset, clear and clock inputs and Q and Q outputs.

This device is edge sensitive to the clock input and changes state on the positive going transition of the clock pulse.

Features

High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Function Table Inputs Preset L H L H H H H H Note: Clear H L L H H H H H L Clock X X X J X X X L H L H X K X X X L L H H X Output Q H L H.
L Toggle Q0 H Q0 Q0 L Q0 1 Q L H H.
1 H 1. Q and Q will re.

Datasheet Details

Part number	HD74HC109
Manufacturer	Hitachi Semiconductor
File Size	59.92 KB
Description	Dual J-K Flip-Flops
Datasheet	HD74HC109 Datasheet
Additional preview pages of the HD74HC109 datasheet.

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Full PDF Text Transcription

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HD74HC109 Dual J-K Flip-Flops (with Preset and Clear) Description Each flip-flop has independent J, K , preset, clear and clock inputs and Q and Q outputs. This device is edge sensitive to the clock input and changes state on the positive going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input.

Published: Mar 23, 2005 |