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Honeywell International Electronic Components Datasheet

HX6656 Datasheet

32K x 8 ROM-SOI

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Military & Space Products
32K x 8 ROM—SOI
FEATURES
RADIATION
• Fabricated with RICMOSIV Silicon on Insulator
(SOI) 0.75 µm Process (Leff = 0.6 µm)
• Total Dose Hardness through 1x106 rad(SiO2)
• Dynamic and Static Transient Upset
www.DataSheet4U.Hcoamrdness through 1x109 rad(Si)/s
• Dose Rate Survivability through 1x1011 rad(Si)/s
• Neutron Hardness through 1x1014 cm-2
• SEU Immune
• Latchup Free
HX6656
OTHER
• Read Cycle Times
< 17 ns (Typical)
25 ns (-55 to 125°C)
• Typical Operating Power <15 mW/MHz
• Asynchronous Operation
• CMOS or TTL Compatible I/O
• Single 5 V ± 10% Power Supply
• Packaging Options
- 28-Lead Flat Pack (0.500 in. x 0.720 in.)
- 28-Lead DIP, MIL-STD-1835, CDIP2-T28
- 36-Lead Flat Pack (0.630 in. x 0.650 in.)
GENERAL DESCRIPTION
The 32K x 8 Radiation Hardened ROM is a high perform-
ance 32,768 word x 8-bit read only memory with industry-
standard functionality. It is fabricated with Honeywell’s
radiation hardened technology, and is designed for use in
systems operating in radiation environments. The ROM
operates over the full military temperature range and re-
quires only a single 5 V ± 10% power supply. The ROM is
available with either TTL or CMOS compatible I/O. Power
consumption is typically less than 15 mW/MHz in operation,
and less than 5 mW when de-selected. The ROM operation
is fully asynchronous, with an associated typical access
time of 14 ns.
Honeywell’s enhanced SOI RICMOSIV (Radiation Insen-
sitive CMOS) technology is radiation hardened through the
use of advanced and proprietary design, layout, and pro-
cess hardening techniques. The RICMOSIV process is a
5-volt, SIMOX CMOS technology with a 150 Å gate oxide
and a minimum drawn feature size of 0.75 µm (0.6 µm
effective gate length—Leff). Additional features include
tungsten via plugs, Honeywell’s proprietary SHARP pla-
narization process, and a lightly doped drain (LDD) struc-
ture for improved short channel reliability.


Honeywell International Electronic Components Datasheet

HX6656 Datasheet

32K x 8 ROM-SOI

No Preview Available !

HX6656
FUNCTIONAL DIAGRAM
A:0-8,12-13
CE
NCS
11
www.DataSheet4U.com
NOE
A:9-11,14
4
Row
Decoder
32,768 x 8
Memory
Array
•••
Column Decoder
Data O utp ut
Q :0-7
8
CS • CE • OE
(0 = high Z)
1 = enab led
Signal #
Signal
All controls must b e
enab led for a signal to
p ass. (#: numb er of
b uffers, default = 1)
SIGNAL DEFINITIONS
A: 0-14
Q: 0-7
NCS
NOE
CE*
Address input pins which select a particular eight-bit word within the memory array.
Data Output Pins.
Negative chip select, when at a low level allows normal read operation. When at a high level NCS forces the
ROM to a precharge condition, holds the data output drivers in a high impedance state and disables all input
buffers except CE. If this signal is not used it must be connected to VSS.
Negative output enable, when at a high level holds the data output drivers in a high impedance state. When
at a low level, the data output driver state is defined by NCS and CE. If this signal is not used it must be
connected to VSS.
Chip enable, when at a high level allows normal operation. When at a low level CE forces the ROM to a
precharge condition, holds the data output drivers in a high impedance state and disables all the input buffers
except the NCS input buffer. If this signal is not used it must be connected to VDD.
TRUTH TABLE
NCS
L
H
X
CE* NOE MODE
Q
H
L
Read
Data Out
X XX Deselected High Z
L XX Disabled High Z
*Not Available in 28-lead DIP or 28-Lead Flat Pack
Notes:
X: VI=VIH or VIL
XX: VSSVIVDD
NOE=H: High Z output state maintained
for NCS=X, CE=X
2


Part Number HX6656
Description 32K x 8 ROM-SOI
Maker Honeywell
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