HYMP512Uxxx 512m equivalent, ddr2 sdram unbuffered dimms based on 512m.
* JEDEC standard Double Data Rate2 Synchrnous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply All inputs and outputs are compatible with SSTL_1.8 interface 4 Bank.
and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.0 / Apr. 2005 1
1240pin DDR2 SDRAM Unbuffered DIMMs SPEED GRADE & KEY PARAMETERS
E3.
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