HY57V283220T dram equivalent, 4 banks x 1m x 32bit synchronous dram.
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* JEDEC standard 3.3V power supply All device pins are compatible with LVTTL interface 86TSOP-II, 90Ball FBGA with 0.8mm of pin pitch Al.
which require wide data I/O and high bandwidth. HY57V283220(L)T(P) / HY5V22(L)F(P) is organized as 4banks of 1,048,576x3.
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