Standard SDRAM Protocol Internal 4bank operation
* Power Supply Voltage : VDD = 1.8V, VDDQ = 1.8V LVCMOS compatible I/O Interface Low Voltage interface to reduce I/O.

and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 0.3 / July 2004 1 w w w .D at h S a t e e 4U . m o c HY5S6B6D(L/S)F(P)-xE 4Banks x1M x 16b.

HY5S6B6D

HY5S6B6x

HY5S2B6DLF-BE

HY5S2B6DLF-SE

HY5S2B6DLFP-BE

HY5S2B6DLFP-SE

HY5S5B2BLF-6E

HY5S5B2BLF-HE

HY5S5B2BLF-SE

HY5S5B2BLFP-6E

HY5S5B2BLFP-HE

HY5S5B2BLFP-SE

HY5S5B2CLFP-6E