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ICS952003 - Programmable Timing Control Hub

General Description

The ICS952003 is a two chip clock solution for desktop designs using SIS 645/650 style chipsets.

When used with a zero delay buffer such as the ICS9179-06 for PC133 or the ICS93705 for DDR applications it provides all the necessary clocks signals for such a system.

Key Features

  • 2 - Pairs of differential CPUCLKs (differential current mode).
  • 1 - SDRAM @ 3.3V.
  • 8 - PCI @3.3V.
  • 2 - AGP @ 3.3V.
  • 2 - ZCLKs @ 3.3V.
  • 1- 48MHz, @3.3V fixed.
  • 1- 24/48MHz, @3.3V selectable by I2C (Default is 24MHz).
  • 3- REF @3.3V, 14.318MHz. Features/Benefits:.
  • Selectable asynchronous/synchronous SDRAM, AGP, ZCLK and PCI outputs.
  • Programmable output frequency, divider ratios, output rise/ falltime, output skew.

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Datasheet Details

Part number ICS952003
Manufacturer ICS
File Size 243.02 KB
Description Programmable Timing Control Hub
Datasheet download datasheet ICS952003 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS952003 Preliminary Product Review Programmable Timing Control Hub™ for P4™ processor Recommended Application: SIS 645/650 style chipsets. Output Features: • 2 - Pairs of differential CPUCLKs (differential current mode) • 1 - SDRAM @ 3.3V • 8 - PCI @3.3V • 2 - AGP @ 3.3V • 2 - ZCLKs @ 3.3V • 1- 48MHz, @3.3V fixed. • 1- 24/48MHz, @3.3V selectable by I2C (Default is 24MHz) • 3- REF @3.3V, 14.318MHz. Features/Benefits: • Selectable asynchronous/synchronous SDRAM, AGP, ZCLK and PCI outputs • Programmable output frequency, divider ratios, output rise/ falltime, output skew. • Programmable spread percentage for EMI control. • Watchdog timer technology to reset system if system malfunctions. • Programmable watch dog safe frequency.