ICS952011 - Programmable Timing Control Hub
The ICS952011 is a two chip clock solution for desktop designs using SIS 645/645DX/648/650 style chipsets.
When used with a zero delay buffer such as the ICS9179-16 for PC133 or the ICS93735 for DDR applications it provides all the necessary clocks signals for such a system.
The ICS952011 is part of
ICS952011 Features
* 2 - Pairs of differential CPUCLKs (differential current mode)
* 1 - SDRAM @ 3.3V
* 9 - PCI @3.3V (including 2 free-running)
* 2 - AGP @ 3.3V
* 2 - ZCLKs @ 3.3V
* 1- 12/48MHZ @ 3.3V
* 1- 24/48MHz, @3.3V selectable by I2C
* 3- REF @3.3
