ICS952001 Datasheet - Integrated Circuit Systems

ICS952001 Preliminary Product Previes

The ICS952001 is a two chip clock solution for desktop designs using SIS 645/650 style chipsets. When used with a zero delay buffer such as the ICS9179-06 for PC133 or the ICS93705 for DDR applications it provides all the necessary clocks signals for such a system. The ICS952001 is part of a whole n.

ICS952001 Features

* 2 - Pairs of differential CPUCLKs (differential current mode)

* 1 - SDRAM @ 3.3V

* 8 - PCI @3.3V

* 2 - AGP @ 3.3V

* 2 - ZCLKs @ 3.3V

* 1- 48MHz, @3.3V fixed.

* 1- 24/48MHz, @3.3V selectable by I2C (Default is 24MHz)

* 3- REF @3.3V, 1

ICS952001_IntegratedCircuitSystems.pdf

ICS952001 Datasheet Preview — Preview of ICS952001 PDF

Datasheet Details

Part number:

ICS952001

Manufacturer:

Integrated Circuit Systems

File Size:

212.24 KB

Description:

Preliminary product previes.

📁 Related Datasheet

ICS952003 Programmable Timing Control Hub (ICS)

ICS952004 Programmable Timing Control Hub for P4 processor (Integrated Circuit Systems)

ICS952011 Programmable Timing Control Hub (Integrated Circuit Systems)

ICS952301 Frequency Timing Generator for Transmeta Systems (Integrated Circuit Systems)

ICS952302 Frequency Generator for TransmetaTM (Integrated Circuit Systems)

ICS952601 Programmable Timing Control Hub (Renesas)

ICS952601 Programmable Timing Control Hub (Integrated Circuit Systems)

ICS952606 Programmable Timing Control Hub for Next Gen P4 processor (Integrated Circuit Systems)

TAGS

ICS952001 ICS952001 Preliminary Product Previes Integrated Circuit Systems

ICS952001 Distributor