1:6 lvds output 1.8v fanout buffer.
* Six low skew, low additive jitter LVDS output pairs
* One differential clock input pair
* Differential CLK, nCLK pair can accept the following differential
.
demanding well-defined performance and repeatability. One differential input and six low skew outputs are available. The.
The IDT8P34S1106I is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The IDT8P34S1106I is characterized to operate from a 1.8V power su.
Image gallery
TAGS
Download (Size : 415.89KB)