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IS43DR32160C - 16Mx32 512Mb DDR2 DRAM

Description

ISSI's 512Mb DDR2 SDRAM uses a double-data-rate architecture to achieve high-speed operation.

The double-data rate architecture is essentially a 4n-prefetch architecture, with an interface designed to transfer two data words per clock cycle at the I/O balls.

Features

  • Vdd = 1.8V ±0.1V, Vddq = 1.8V ±0.1V.
  • JEDEC standard 1.8V I/O (SSTL_18-compatible).
  • Double data rate interface: two data transfers per clock cycle.
  • Differential data strobe (DQS, DQS).
  • 4-bit prefetch architecture.
  • On chip DLL to align DQ and DQS transitions with CK.
  • 4 internal banks for concurrent operation.
  • Programmable CAS latency (CL) 3, 4, 5, and 6 supported.
  • Posted CAS and programmable additive latency.

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Datasheet Details

Part number IS43DR32160C
Manufacturer ISSI
File Size 706.28 KB
Description 16Mx32 512Mb DDR2 DRAM
Datasheet download datasheet IS43DR32160C Datasheet
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IS43/46DR32160C 16Mx32 512Mb DDR2 DRAM FEATURES • Vdd = 1.8V ±0.1V, Vddq = 1.8V ±0.1V • JEDEC standard 1.
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