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IS61DDPB22M36C1 Datasheet 72Mb DDR-IIP CIO SYNCHRONOUS SRAM

Manufacturer: ISSI (now Infineon)

Download the IS61DDPB22M36C1 datasheet PDF. This datasheet also includes the IS61DDPB24M18C variant, as both parts are published together in a single manufacturer document.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS61DDPB24M18C-ISSI.pdf) that lists specifications for multiple related part numbers.

General Description

at page 6 for each ODT option.

DESCRIPTION The 72Mb IS61DDPB22M36C/C1/C2 and IS61DDPB24M18 C/C1/C2 are synchronous, high-performance CMOS static random access memory (SRAM) devices.

These SRAMs have a common I/O bus.

Overview

IS61DDPB24M18C/C1/C2 IS61DDPB22M36C/C1/C2 4Mx18, 2Mx36 72Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM (2.

Key Features

  • 2Mx36 and 4Mx18 configuration available.
  • Common I/O read and write ports.
  • Max. 567 MHz clock for high bandwidth.
  • Synchronous pipeline read with self-timed late write operation.
  • Double Data Rate (DDR) interface for read and write input ports.
  • 2.5 cycle read latency.
  • Fixed 2-bit burst for read and write operations.
  • Two input clocks (K and K#) for address and control registering at rising edges only.
  • Two echo clocks (CQ and CQ#) that are delivere.