IS61QDPB44M18C Datasheet 72mb Quadp Synchronous Sram

Manufacturer: ISSI (now Infineon)

Overview: IS61QDPB44M18C/C1/C2 IS61QDPB42M36C/C1/C2 4Mx18, 2Mx36 72Mb QUADP (Burst 4) SYNCHRONOUS SRAM (2.

Datasheet Details

The 72Mb IS61QDPB42M36C/C1/C2 and IS61QDPB44M18 C/C1/C2 are synchronous, high-performance CMOS static random access memory (SRAM) devices.

These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround.

The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed.

2Mx36 and 4Mx18 configuration available.
Separate independent read and write ports with concurrent read and write operations.
Max. 567 MHz clock for high bandwidth.
Double Data Rate (DDR) interface for read and write input ports.
2.5 cycle read latency.
Fixed 4-bit burst for read and write operations.
Clock stop support.
Two input clocks (K and K#) for address and control registering at rising edges only.

Part Number	Description
IS61QDPB44M18C1	72Mb QUADP SYNCHRONOUS SRAM
IS61QDPB44M18C2	72Mb QUADP SYNCHRONOUS SRAM
IS61QDPB44M18	QUADP (Burst of 4) Synchronous SRAMs
IS61QDPB44M18A	72Mb QUADP (Burst 4) SYNCHRONOUS SRAM
IS61QDPB44M18A1	72Mb QUADP (Burst 4) SYNCHRONOUS SRAM
IS61QDPB44M18A2	72Mb QUADP (Burst 4) SYNCHRONOUS SRAM
IS61QDPB44M18B	72Mb QUADP SYNCHRONOUS SRAM
IS61QDPB44M18B1	72Mb QUADP SYNCHRONOUS SRAM
IS61QDPB44M18B2	72Mb QUADP SYNCHRONOUS SRAM
IS61QDPB41M18A	18Mb QUADP (Burst 4) SYNCHRONOUS SRAM