ICS93705 buffer equivalent, ddr phase lock loop zero delay clock buffer.
* Low skew, low jitter PLL clock driver
* I2C for functional and output control
* Feedback pins for input to output synchronization
* Spread Spectrum tol.
Features:
* Low skew, low jitter PLL clock driver
* I2C for functional and output control
* Feedback pins for input to output synchronization
* Spread Spectrum tolerant inputs
* 3.3V tolerant CLK_INT input Switching Characteristic.
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