IDT2309A buffer equivalent, 3.3v zero delay clock buffer.
DESCRIPTION:
IDT2309A
* Phase-Lock Loop Clock Distribution
* 10MHz to 133MHz operating frequency
* Distributes one clock input to one bank of five and one .
The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the r.
IDT2309A
* Phase-Lock Loop Clock Distribution
* 10MHz to 133MHz operating frequency
* Distributes one clock input to one bank of five and one bank of four outputs
* Separate output enable for each output bank
* Output Skew < 25.
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