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Integrated Device Technology Electronic Components Datasheet

IDT71T016 Datasheet

LOW POWER 2V CMOS SRAM 1 MEG (64K x 16-BIT)

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Integrated Device Technology, Inc.
LOW POWER 2V CMOS SRAM
1 MEG (64K x 16-BIT)
ADVANCE
INFORMATION
IDT71T016
FEATURES:
• 64K x 16 Organization
• Wide Operating Voltage Range: 1.8 to 2.7V
• Speed Grades: 150ns, 200ns
• Low Operating Power: 20mA (max)
• Low Standby Power: 5µA (max)
• Low-Voltage Data Retention: 1.5V (min)
• Available in a 44-pin TSOP package
DESCRIPTION:
The IDT71T016 is a 1,048,576-bit very low-power Static
RAM organized as 64K x 16. It is fabricated using IDT’s high-
reliability CMOS technology. This state-of-the-art technology,
combined with innovative circuit design techniques, provides
a cost-effective solution for low-power memory needs. It uses
a 6-transistor memory cell.
Operation is from a single extended-range 2.5V supply.
This extended supply range makes the device ideally suited
for unregulated battery-powered applications. Fully static
asynchronous circuitry is used, requiring no clocks or refresh
for operation.
The IDT71T016 is packaged in a JEDEC standard 44-pin
TSOP Type II.
FUNCTIONAL BLOCK DIAGRAM
Output
OE Enable
Buffer
A0 - A15
Address
Buffers
Chip
CS Enable
Buffer
Write
WE Enable
Buffer
Row / Column
Decoders
64K x 16
Memory
Array
8
Sense
16 Amps
and
Write
Drivers
8
High
Byte
I/O
Buffer
Low
Byte
I/O
Buffer
I/O 15
8
I/O 8
I/O 7
8
I/O 0
BHE
BLE
Byte
Enable
Buffers
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
©1997 Integrated Device Technology, Inc.
3777 drw 01
MAY 1997
DSC-3777/1
1


Integrated Device Technology Electronic Components Datasheet

IDT71T016 Datasheet

LOW POWER 2V CMOS SRAM 1 MEG (64K x 16-BIT)

No Preview Available !

IDT71T016
LOW POWER 2V CMOS STATIC RAM 1 MEG (64K x 16-BIT)
PIN CONFIGURATIONS
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
A4
A3
A2
A1
A0
CS
I/O 0
I/O 1
I/O 2
I/O 3
VDD
VSS
I/O 4
I/O 5
I/O 6
I/O 7
WE
A15
A14
A13
A12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
SO44-2
TSOP
TOP VIEW
TRUTH TABLE(1)
CS
OE
WE
HXX
L LH
L LH
L LH
LXL
LXL
LXL
L HH
L XX
NOTE:
1.H = VIH, L = VIL, X = Don't care.
BLE
X
L
H
L
L
L
H
X
H
44 A5
43 A6
42 A7
41 OE
40 BHE
39 BLE
38 I/O 15
37 I/O 14
36 I/O 13
35 I/O 12
34 VSS
33 VDD
32 I/O 11
31 I/O 10
30 I/O 9
29 I/O 8
28 NC
27 A8
26 A9
25 A10
24 A11
23 NC
3777 drw 02
BHE
X
H
L
L
L
H
L
X
H
CAPACITANCE
(TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions Max. Unit
CIN
Input Capacitance VIN = 1dV
6 pF
CI/O I/O Capacitance VOUT = 1dV 7 pF
NOTE:
3777 tbl 06
1. This parameter is guaranteed by device characterization, but not prod-
uction tested.
PIN DESCRIPTIONS
A0 – A15
CS
WE
OE
BHE
BLE
I/O0 - I/O15
VDD
VSS
Address Inputs
Chip Select
Write Enable
Output Enable
High Byte Enable
Low Byte Enable
Data Input/Output
Power
Ground
Input
Input
Input
Input
Input
Input
I/O
Pwr
Gnd
3777 tbl 01
I/O0-I/O7
High-Z
DATAOUT
High-Z
DATAOUT
DATAIN
DATAIN
High-Z
High-Z
High-Z
I/O8-I/O15
High-Z
High-Z
DATAOUT
DATAOUT
DATAIN
High-Z
DATAIN
High-Z
High-Z
Function
Deselected - Standby
Low Byte Read
High Byte Read
Word Read
Word Write
Low Byte Write
High Byte Write
Outputs Disabled
Outputs Disabled
3777 tbl 02
2


Part Number IDT71T016
Description LOW POWER 2V CMOS SRAM 1 MEG (64K x 16-BIT)
Maker Integrated Device Technology
Total Page 8 Pages
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