• Part: IDTCSPU877A
  • Manufacturer: Integrated Device Technology
  • Size: 179.31 KB
Download IDTCSPU877A Datasheet PDF
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IDTCSPU877A Description

IDTCSPU877A 1 to 10 differential clock distribution Optimized for clock distribution in DDR2 (Double Data Rate) SDRAM applications Operating frequency: 125MHz to 270MHz Very low skew: ≤40ps 1.8V AVDD and 1.8V VDDQ CMOS control signal input Test mode enables buffers while disabling PLL Low current power-down mode Tolerant of Spread Spectrum input clock Available in 52-Ball VFBGA and 40-pin MLF packages APPLICATIONS:.

IDTCSPU877A Key Features

  • 1 to 10 differential clock distribution
  • Optimized for clock distribution in DDR2 (Double Data Rate) SDRAM

IDTCSPU877A Applications

  • Operating frequency: 125MHz to 270MHz