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IDTCSPF2510C - 3.3V PHASE-LOCK LOOP CLOCK DRIVER

Datasheet Summary

Description

The IDTCSPF2510C is a high performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver.

frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal.

It is specifically designed for use with synchronous DRAMs.

Features

  • Phase-Lock Loop Clock Distribution for Synchronous DRAM.

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Datasheet Details

Part number IDTCSPF2510C
Manufacturer Integrated Device Technology
File Size 100.89 KB
Description 3.3V PHASE-LOCK LOOP CLOCK DRIVER
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www.DataSheet4U.com IDTCSPF2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER 0ºC TO 85ºC TEMPERATURE RANGE 3.3V PHASE-LOCK LOOP CLOCK DRIVER IDTCSPF2510C FEATURES: • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications • Distributes one clock input to one bank of ten outputs • Output enable bank control • External feedback (FBIN) pin is used to synchronize the output to the clock input signal • On-chip series damping resistors with each driver • No external RC network required for PLL loop stability • Operates at 3.
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