QS5LV91955Q driver equivalent, 3.3v low skew cmos pll clock driver.
DESCRIPTION:
QS5LV919
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3.3V operation JEDEC compatible LVTTL level outputs Clock inputs a.
to be customized for linear VCO operation over a wide range of input SYNC frequencies. The PLL can also be disabled by t.
QS5LV919
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3.3V operation JEDEC compatible LVTTL level outputs Clock inputs are 5V tolerant < 300ps output skew, Q0
–Q4 2xQ output, Q outputs, Q output, Q/.
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