CD4019BMS gate equivalent, cmos quad and/or select gate.
* High Voltage Type (20V Rating)
* Medium Speed Operation tPHL = tPLH = 60ns (typ.) at CL = 50pF, VDD = 10V
* Standardized Symmetrical Output Characteristics .
* And/Or Select Gating
* Shift-Right/Shift-Left Registers
* True/Complement Selection
* AND/OR/Exclusive.
of ‘B’ Series CMOS Devices”
* Maximum Input Current of 1µa at 18V Over Full Package-Temperature Range; - 100nA at 18V and 25
oC
* Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V
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