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MachXO2 Datasheet FPGA

Manufacturer: Lattice

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Overview

MachXO2™ Family Data Sheet DS1035 Version 3.3, March 2017 MachXO2 Family Data Sheet Introduction May 2016 Data Sheet.

Key Features

  • Flexible Logic Architecture.
  • Six devices with 256 to 6864 LUT4s and  18 to 334 I/Os.
  • Ultra Low Power Devices.
  • Advanced 65 nm low power process.
  • As low as 22 µW standby power.
  • Programmable low swing differential I/Os.
  • Stand-by mode and other power saving options.
  • Embedded and Distributed Memory.
  • Up to 240 kbits sysMEM™ Embedded Block RAM.
  • Up to 54 kbits Distributed RAM.
  • Dedicated FIFO control logic.
  • On-C.

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