DS34S102
Description
These IETF PWE3 SATo P/CESo PSN/TDMo IP/HDLC pliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial stream to be transported transparently over IP, MPLS or Ethernet networks. Jitter and wander of recovered clocks conform to G.823/G.824, G.8261, and TDM specifications. TDM data is transported in up to 64 individually configurable bundles. All standardsbased TDM-over-packet mapping methods are supported except AAL2. Frame-based serial HDLC data flows are also supported. The high level of integration available with the DS34S10x devices minimizes cost, board space, and time to market.
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Features
Transport of E1, T1, E3, T3 or STS-1 TDM or CBR Serial Signals Over Packet Networks Full Support for These Mapping Methods: SATo P, CESo PSN, TDMo IP (AAL1), HDLC, Unstructured, Structured, Structured with CAS Adaptive Clock Recovery, mon Clock, External Clock and Loopback Timing Modes On-Chip TDM Clock Recovery Machines, One Per Port,...
