Datasheet Summary
Micrel, Inc.
TRIPLE 5-INPUT OR/NOR GATE
Features
DESCRIPTION s Max. propagation delay of 750ps s IEE min. of
- 25mA s Industry standard 100K ECL levels s Extended supply voltage option:
VEE =
- 4.2V to
- 5.5V s Voltage and temperature pensation for improved noise immunity s 20% faster than Fairchild 300K at lower power s Internal 75kΩ input pull-down resistors s Function and pinout patible with Fairchild F100K s Available in 28-pin PLCC package
The SY100S301 is an ultra-fast triple 5-input OR/NOR gate designed for use in high-performance ECL systems. The inputs on this device have 75kΩ pull-down resistors.
BLOCK DIAGRAM
D1a D2a D3a D4a D5a
D1b D2b D3b D4b...