SY100S304 Datasheet | Micrel Semiconductor

Micrel, Inc. QUINT AND/NAND GATE Features DESCRIPTION s Max. propagation delay of 1050ps s IEE min. of - 60m A s Extended supply voltage option: VEE = - 4.2V to - 5.5V s Voltage and temperature pensation for improved noise immunity s Internal 75kΩ input pull-down resistors s 40% faster than Fairchild 300K at lower power s Function and pinout patible with Fairchild F100K s Available in 28-pin PLCC package The SY100S304 is an ultra-fast quint AND/NAND gate designed for use in high-performance ECL systems. This device also Features a Function (F) output which is the wire NOR of the AND gate outputs. The inputs on the device have 75kΩ pull-down resistors. BLOCK DIAGRAM D1a D2a D1b D2b D1c D2c D1d D2d D1e D2e Oa Oa Ob Ob Oc Oc Od Od Oe Oe PIN NAMES Pin Dna - Dne E Oa - Oe Oa - Oe VEES VCCA Function Data Inputs (n-1...5) Enable Input Data Outputs plementary Data Outputs VEE Substrate VCCO for ECL Outputs M9999-042307 hbwhelp@micrel. or (408) 955-1690 Rev.: I Amendment: /0 Issue Date: April 2007 Micrel, Inc. PACKAGE/ORDERING INFORMATION D2a D1a Oa VEES Oa Ob Ob D1b D2b VEE VEES D1c D2c...