SY100S307 Datasheet | Micrel Semiconductor

Micrel, Inc. QUINT EXCLUSIVE OR/NOR GATE Features DESCRIPTION - Max. propagation delay of 1000ps - IEE min. of - 58m A - Extended supply voltage option: VEE = - 4.2V to - 5.5V - Voltage and temperature pensation for improved noise immunity - Internal 75kΩ input pull-down resistors - 50% faster than Fairchild 300K at lower power - Function and pinout patible with Fairchild F100K - Available in 28-pin PLCC package The SY100S307 is an ultra-fast quint exclusive-OR/NOR gate designed for use in high-performance ECL systems. A function output that is the wire-OR result of the exclusive-OR outputs is also available. The inputs on the device have 75kΩ pull-down resistors. block DIAGRAM PIN NAMES Pin Dna - Dne E Oa - Oe Oa - Oe VEES VCCA Function Data Inputs (n-1...5) Enable Input Data Outputs plementary Data Outputs VEE Substrate VCCO for ECL Outputs M9999-060910 hbwhelp@micrel. or (408) 955-1690 Rev.: I Amendment: /0 Issue Date: June 2010 Micrel, Inc. PACKAGE/ORDERING INFORMATION 28-Pin PLCC...