SY100S302 Datasheet | Micrel Semiconductor

Micrel, Inc. QUINT 2-INPUT OR/NOR GATE Features DESCRIPTION s Max. propagation delay of 700ps s IEE min. of - 45mA s Industry standard 100K ECL levels s Extended supply voltage option: VEE = - 4.2V to - 5.5V s Voltage and temperature pensation for improved noise immunity s Internal 75kΩ input pull-down resistors s 50% faster than Fairchild 300K s Function and pinout patible with Fairchild F100K s Available in 28-pin PLCC package The SY100S302 offers five 2-input OR/NOR gates designed for use in high-performance ECL systems. The five gates are controlled by a mon Enable signal. All inputs have 75kΩ pull-down resistors and all outputs are buffered. BLOCK...