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MT28F322P3 - FLASH MEMORY

Description

Table.

See page 35 for mechanical drawing.

Timing 70ns access 80ns access Boot Block Configuration Top Bottom Package 48-ball FBGA (6 x 8 ball grid) Operating Temperature Range Commercial (0ºC to +70ºC) Extended (-40ºC to +85ºC) Part Number Example:

Features

  • Flexible dual-bank architecture Support for true concurrent operation with zero latency Read bank a during program bank b and vice versa Read bank a during erase bank b and vice versa.
  • Basic configuration: Seventy-one erasable blocks Bank a (8Mb for data storage) Bank b (24Mb for program storage).
  • VCC, VCCQ, VPP voltages 2.7V (MIN), 3.3V (MAX) VCC 2.2V (MIN), 3.3V (MAX) VCCQ 3.0V (TYP) VPP (in-system.

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www.DataSheet4U.com PRELIMINARY‡ 2 MEG x 16 ASYNC/PAGE FLASH MEMORY FLASH MEMORY MT28F322P3 Low Voltage, Extended Temperature FEATURES • Flexible dual-bank architecture Support for true concurrent operation with zero latency Read bank a during program bank b and vice versa Read bank a during erase bank b and vice versa • Basic configuration: Seventy-one erasable blocks Bank a (8Mb for data storage) Bank b (24Mb for program storage) • VCC, VCCQ, VPP voltages 2.7V (MIN), 3.3V (MAX) VCC 2.2V (MIN), 3.3V (MAX) VCCQ 3.0V (TYP) VPP (in-system PROGRAM/ERASE) 12V ±5% (HV) VPP tolerant (factory programming compatibility) • Random access time: 70ns @ 2.7V VCC • Page Mode read access Eight-word page Interpage read access: 70ns @ 2.7V Intrapage read access: 30ns @ 2.
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