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ZL40230 - Low Additive Jitter 10 output LVPECL/LVDS/HCSL Fanout Buffer

Description

6 Functional Description 10 Clock Inputs 10 Clock Outputs 13 Crystal Oscillator Input 14 Termination of unused inputs and outputs 14 Power Consumption 14 Power Supply Filtering 16 Power Supplies and Power-up Sequence 16 Host Interface 17 Typical device performance 20 Register Map 24 AC and

Features

  • 3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal.
  • Ten differential LVPECL/LVDS/HCSL outputs.
  • One LVCMOS output.
  • Ultra-low additive jitter: 24fs (integration band: 12kHz to 20MHz at 625MHz clock frequency).
  • Supports clock frequencies from 0 to 1.6GHz.
  • Supports 2.5V or 3.3V power supplies on LVPECL/LVDS/HC.

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Datasheet Details

Part number ZL40230
Manufacturer Microsemi
File Size 1.76 MB
Description Low Additive Jitter 10 output LVPECL/LVDS/HCSL Fanout Buffer
Datasheet download datasheet ZL40230 Datasheet
Additional preview pages of the ZL40230 datasheet.

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Full PDF Text Transcription

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Data Sheet ZL40230 Low Skew, Low Additive Jitter 10 output LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output Features • 3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal • Ten differential LVPECL/LVDS/HCSL outputs • One LVCMOS output • Ultra-low additive jitter: 24fs (integration band: 12kHz to 20MHz at 625MHz clock frequency) • Supports clock frequencies from 0 to 1.6GHz • Supports 2.5V or 3.3V power supplies on LVPECL/LVDS/HCSL outputs • Supports 1.5V, 1.8V, 2.5V or 3.
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