ZL40235 - Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanout Buffer

Product Overview

Microsemi

Datasheet Details

Part number	ZL40235
Manufacturer	Microsemi
File Size	1.76 MB
Description	Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanout Buffer
Datasheet	ZL40235 Datasheet
Additional preview pages of the ZL40235 datasheet.

Product details

Description

6 Functional Description 9 Clock Inputs 9 Clock Outputs 12 Crystal Oscillator Input 13 Termination of unused inputs and outputs 13 Power Consumption 13 Power Supply Filtering 14 Power Supplies and Power-up Sequence 14 Host Interface 14 Typical device performance 19 Register Map 23 AC and DC Electrical Characteristics 29 Absolute Maximum Ratings 29 Recommended Operating Conditions 29 Change History 48 Package Outline 49 October 2018 © 2018 Microsemi Corporation ZL40235 2 Figure

Features

3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal.
Five differential LVPECL/LVDS/HCSL outputs and one LVCMOS output.
Ultra-low additive jitter: 24fs (integration band 12kHz to 20MHz at 625MHz clock frequency).
Supports clock frequencies from 0 to 1.6GHz.
Supports 2.5V or 3.3V power supplies for LVPECL, LVDS or HCS.

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Other Datasheets by Microsemi

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Published: Jul 5, 2019 |