ZL40235 Datasheet - Microsemi

ZL40235, Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanout Buffer

Data Sheet ZL40235 Low Skew, Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output .
6 Functional Description 9 Clock Inputs 9 Clock Outputs 12 Crystal Oscillator Input 13 Termination of unused inputs and outputs 13 Power Consump.

Features

* 3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal
* Five differential LVPECL/LVDS/HCSL outputs and one LVCMOS output
* Ultra-low additi

Applications

* General purpose clock distribution
* Low jitter clock trees
* Logic translation
* Clock and data signal restoration
* Wired communications: OTN, SONET/SDH, GE, 10 GE, FC and 10G FC
* PCI Express generation 1/2/3/4 clock distribution
* Wireles

ZL40235-Microsemi.pdf