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MCM63F737K - (MCM63F737K / MCM63F819K) 128K x 36 and 256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM

General Description

Pin Locations 85 Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new external address.

Used to initiate a READ, WRITE, or chip deselect.

Key Features

  • pt G, LBO, and ZZ. Linear Burst Order Input: This pin must remain in steady state (this signal not registered or latched). It must be tied high or low. Low.
  • linear burst counter. High.
  • interleaved burst counter. Synchronous Address Inputs: These inputs are reg.

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Other Datasheets by Motorola Semiconductor (now NXP Semiconductors)

Part Number Description
MCM63F733A 128K x 32 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
MCM63F819K (MCM63F737K / MCM63F819K) 128K x 36 and 256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
MCM63F837 (MCM63F837 / MCM63F919) 256K x 36 and 512K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
MCM63F919 256K x 36 and 512K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
MCM6323A 64K x 16 Bit 3.3 V Asynchronous Fast Static RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR TECHNICAL DATA Order this document by MCM63F737K/D Advance Information 128K x 36 and 256K x 18 Bit Flow–Through BurstRAM Synchronous Fast Static RAM The MCM63F737K and MCM63F819K are 4M–bit synchronous fast static RAMs designed to provide a burstable, high performance, secondary cache. The MCM63F737K (organized as 128K words by 36 bits) and the MCM63F819K (organized as 256K words by 18 bits) integrate input registers, a 2–bit address counter, and high speed SRAM onto a single monolithic circuit for reduced parts count in cache data RAM applications. Synchronous design allows precise cycle control with the use of an external clock (K).