MCM69F817 ram equivalent, 256k x 18 bit flow-through burstram synchronous fast static ram.
Value VSS
– 0.5 to + 4.6 VSS
– 0.5 to VDD VSS
– 0.5 to VDD + 0.5 VSS
– 0.5 to VDDQ + 0.5 ± 20 1.6
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Synchronous design allows precise cycle control with the use of an external clock (K). Addresses (SA), data inputs (DQx.
Pin Locations 4B Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new external address. Used to initiate a READ, WRITE, or chip deselect. Synchronous Address Status Proc.
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