MCM69F819 ram equivalent, 256k x 18 bit flow-through burstram synchronous fast static ram.
t Input
93, 94 (a) (b) 88
SBx SGW
Input Input
98
SE1
Input
97 92 87
SE2 SE3 SW
Input Input Input
15, 41, 65, 91 4, 11, 20, 27, 54, 61, 70, 77 5, 10, 17, 21, 26,.
Synchronous design allows precise cycle control with the use of an external clock (K). Addresses (SA), data inputs (DQx.
Pin Locations 4B Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new external address. Used to initiate a READ, WRITE, or chip deselect. Synchronous Address Status Proc.
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