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CS5826 - Dual Pixel LVDS Display Interface (LDI) Transmitter

Description

The CS5826 converts 48 bits (Dual pixel 24-bit color) of CMOS/TTL data into 8 LVDS (Low Voltage Differential Signalling) data streams.

Control signals (VSYNC, HSYNC, DE and two user-defined signals) are sent during blanking intervals.

Features

  • Complies with OpenLDI specification for digital display interface.
  • 30 to 112 (224)MHz clock support.
  • Supports SVGA through QXGA panel resolutions.
  • Drives long, low cost cables.
  • DC balance data transmission to reduce ISI distortion.
  • Supports single and dual pixel GUI interface.
  • Rejects cycle-to-cycle jitter.
  • 5V tolerant on data and control input pins.
  • Programmable data and control strobe select (rising or fal.

📥 Download Datasheet

Datasheet Details

Part number CS5826
Manufacturer Myson Technology
File Size 228.52 KB
Description Dual Pixel LVDS Display Interface (LDI) Transmitter
Datasheet download datasheet CS5826 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com CS5826 Dual Pixel LVDS Display Interface (LDI) Transmitter GENERAL DESCRIPTION The CS5826 converts 48 bits (Dual pixel 24-bit color) of CMOS/TTL data into 8 LVDS (Low Voltage Differential Signalling) data streams. Control signals (VSYNC, HSYNC, DE and two user-defined signals) are sent during blanking intervals. The CS5826 provides 3 operating modes: SingleIn-Single-Out, Dual-In-Dual-Out and Single-In-DualOut. In Single-In-Single-Out and Dual-In-Dual-Out modes, single pixel data can be clocked into CS5826 at a maximum rate of 112MHz. In Single-In-Dual-Out mode, CS5826 supports a maximum clock rate of 224MHz. DC balancing on a cycle-to-cycle basis, is also provided to reduce ISI (Inter-Symbol Interference).
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