CS5824 Overview
The CS5824 receives four sets of 7-bit data in CMOS logic level and converts them into four lowvoltage differential signaling (LVDS) serial channels. The 7-bit input data is referenced to the CKIN signal. The RF pin selects either rising or falling edge trigger of CKIN.
CS5824 Key Features
- Four 7-bit serial and one clock LVDS channels
- patible with ANSI TIA/EIA-644 LVDS standard
- Wide CKIN ranges from 31MHz to 68MHz
- Fully integrated on-chip PLL that provides 7X CKIN serial shift clock
- Pin selectable for rising or falling edge trigger
- Support power-down mode
- 5V/3.3V tolerant data input
- Single 3.3V supply operation
- CMOS low power consumption
- Functional patible with DS90C385