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DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD44321181, 44321361
32M-BIT ZEROSBTM SRAM FLOW THROUGH OPERATION
Description
The µPD44321181 is a 2,097,152-word by 18-bit and the µPD44321361 is a 1,048,576-word by 36-bit ZEROSB static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. The µPD44321181 and µPD44321361 are optimized to eliminate dead cycles for read to write, or write to read transitions. These ZEROSB static RAMs integrate unique synchronous peripheral circuitry, 2-bit burst counter and output buffer as well as SRAM core. All input registers are controlled by a positive edge of the single clock input (CLK).
UPD44321181 Datasheet
