Description
www.DataSheet4U.com DATA SHEET MOS INTEGRATED CIRCUIT µ PD44321182, 44321362 32M-BIT ZEROSBTM SRAM PIPELINED OPERATION .
The µPD44321182 is a 2,097,152-word by 18-bit and the µPD44321362 is a 1,048,576-word by 36-bit ZEROSB static RAM fabricated with advanced CMOS techno.
Features
* Low voltage core supply : VDD = 3.3 ± 0.165 V / 2.5 ± 0.125 V
* Synchronous operation
* 100 percent bus utilization
* Internally self-timed write control
* Burst read / write : Interleaved burst and linear burst sequence
* Fully registered inputs and
Applications
* which require synchronous operation, high speed, low voltage, high density and wide bit configuration, such as buffer memory. ZZ has to be set LOW at the normal operation. When ZZ is set HIGH, the SRAM enters Power Down State (“Sleep”). In the “Sleep” state, the SRAM internal state is preserved. Whe
