The following content is an automatically extracted verbatim text
from the original manufacturer datasheet and is provided for reference purposes only.
View original datasheet text
www.DataSheet4U.com
PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
µPD44324085, 44324095, 44324185, 44324365
36M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
Description
The µPD44324085 is a 4,194,304-word by 8-bit, the µPD44324095 is a 4,194,304-word by 9-bit, the µPD44324185 is a 2,097,152-word by 18-bit and the µPD44324365 is a 1,048,576-word by 36-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. The µPD44324085, µPD44324095, µPD44324185 and µPD44324365 integrate unique synchronous peripheral circuitry and a burst counter. All input registers controlled by an input clock pair (K and /K) are latched on the positive edge of K and /K.