UPD4483362
Overview
The µPD4483362 is a 262,144 words by 36 bits synchronous static RAM fabricated with advanced CMOS technology using Full-CMOS six-transistor memory cell. The µPD4483362 is suitable for applications which require synchronous operation, high-speed, low voltage, highdensity memory and wide bit configuration, such as cache and buffer memory.
- Fully synchronous operation
- HSTL Input / Output levels
- Fast clock access time : 3.8 ns (133 MHz)
- Asynchronous output enable control : /G
- Byte write control : /SBa (DQa1-9), /SBb (DQb1-9), /SBc (DQc1-9), /SBd (DQd1-9)
- Common I/O using three-state outputs
- Internally self-timed write cycle
- Late write with 1 dead cycle between Read-Write
- 3.3 V (Chip) / 1.5 V (I/O) supply
- 100-pin PLASTIC LQFP package, 14 mm x 20 mm
