UPD765B Datasheet | NEC

Description The u PD765A/B is an LSI floppy disk controller (FDC) chip which contains the circuitry and control functions for interfacing a processor to 4 floppy disk drives. It is capableof either IBM 3740singledensity format (FM), or IBM System 34 double density format (MFM) including double-sided recording. The u PD765A/B provides control signals which simplify the design of an external phase-locked loop and write prepensation circuitry. The FDC simplifies and handles most of the burdens associated with implementing a floppy disk interface. Hand-shaking signals are provided in the u PD765A/B which make DMA operation easy to incorporate with the aid of an external DMA controller chip, such as the u PD8257. The FDC will operate in eitherthe DMA or non DMA mode. In the non-DMA mode the FDC generates interrupts to !he processor every time a data byte is to be transferred. In the DMA mode, the processor need only load the mand into the FDC and all data transfers occur under control of the FDC and DMA controllers. There are 16 mands which the u PD765A/u PD765B will execute. Most of these mands require multiple 8-bit bytes to fully specify the operation which the processor wishes the FDC to perform. The following mands are available. Read Data Read ID Specify Read Diagnostic Scan Equal Scan High or Equal Scan Low or Equal Version Read Deleted Data Write Data Write ID (Format Write) Write Deleted Data Seek Recalibrate Sense Interrupt Status Sense Drive Status. Ordering Information Device Number u PD765AC2 u PD765B Package Type 40-pin plastic DIP 40-pin plastic DIP Max Freq. of Operation 8 MHz 8 MHz Features Address mark detection circuitry is internal to the FDC which simplifies the phase-locked loop and read elec- tronics. The track stepping rate, head load time, and head unload time are user-programmable. The u PD765A/u PD765B offers additional features such as multi-track and multi-side read and write mands and single and double density capabilities. FM, MFM...